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scds172a - july 2004 ? revised december 2004 1 post office box 655303 ? dallas, texas 75265 low differential gain and phase (d g = 0.2%, d p = 0.1 typ) wide bandwidth (b w = 500 mhz typ) low crosstalk (x talk = ?80 db typ) bidirectional data flow, with near-zero propagation delay low and flat on-state resistance (r on = 3 ? typ, r on(flat) = 1 ? typ) v cc operating range from 3 v to 3.6 v i off supports partial-power-down mode operation data and control inputs provide undershoot clamp diode latch-up performance exceeds 100 ma per jesd 78, class ii esd performance tested per jesd 22 ? 2000-v human-body model (a114-b, class ii) ? 1000-v charged-device model (c101) suitable for both rgb and composite video switching description/ordering information the ti video switch ts3v340 is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (en ) input. when en is low, the switch is enabled, and the d port is connected to the s port. when en is high, the switch is disabled, and the high-impedance state exists between the d and s ports. the select (in) input controls the data path of the multiplexer/demultiplexer. low differential gain and phase makes this switch ideal for composite and rgb video applications. the device has a wide bandwidth and low crosstalk, making it suitable for high-frequency applications as well. ordering information t a package ? orderable part number top-side marking qfn ? rgy tape and reel ts3v340rgyr tf340 soic ? d tube ts3v340d ts3v340 soic ? d tape and reel ts3v340dr ts3v340 ?40 c to 85 c ssop (qsop) ? dbq tape and reel ts3v340dbqr tf340 ?40 c to 85 c tssop ? pw tube ts3v340pw tf340 tssop ? pw tape and reel ts3v340pwr tf340 tvsop ? dgv tape and reel ts3v340dgvr tf340 ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. copyright ? 2004, texas instruments incorporated please be aware that an important notice concerning avail ability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. d d, dbq, dgv, or pw package (top view) rgy package (top view) 116 89 2 3 4 5 6 7 15 14 13 12 11 10 en s1 d s2 d d d s1 c s2 c s1 a s2 a d a s1 b s2 b d b in v gnd cc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 in s1 a s2 a d a s1 b s2 b d b gnd v cc en s1 d s2 d d d s1 c s2 c d c c
scds172a - july 2004 ? revised december 2004 2 post office box 655303 ? dallas, texas 75265 description/ordering information (continued) this device is fully specified for partial-power-down applications using i off . the i off feature ensures that damaging current will not backflow through the device when it is powered down. this switch maintains isolation during power off. to ensure the high-impedance state during power up or power down, en should be tied to v cc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. function table inputs input/output function en in input/output d function l l s1 d port = s1 port l hs2 d port = s2 port h x z disconnect pin description pin name description s1, s2 analog video i/os d analog video i/os in select input en switch-enable input
scds172a - july 2004 ? revised december 2004 3 post office box 655303 ? dallas, texas 75265 parameter definitions parameter description r on resistance between the d and s ports, with the switch in the on state i oz output leakage current measured at the d and s ports, with the switch in the off state i os short-circuit current measured at the i/o pins v in voltage at in v en voltage at en c in capacitance at the control (en , in) inputs c off capacitance at the analog i/o port when the switch is off c on capacitance at the analog i/o port when the switch is on v ih minimum input voltage for logic high for the control (en , in) inputs v il maximum input voltage for logic low for the control (en , in) inputs v ik i/o and control (en , in) inputs diode clamp voltage v i voltage applied to the d or s pins when d or s is the switch input v o voltage applied to the d or s pins when d or s is the switch output i ih input high leakage current of the control (en , in) inputs i il input low leakage current of the control (en , in) inputs i i current into the d or s pins when d or s is the switch input i o current into the d or s pins when d or s is the switch output i off output leakage current measured at the d or s ports, with v cc = 0 t pds propagation delay measured between s1 x and s2 x under the specified conditions, measured from 50% of the digital input to 90% of the analog output b w frequency response of the switch in the on state, measured at ?3 db x talk unwanted signal coupled from channel to channel. measured in ?db. x talk = 20 log v o /v i . this is a nonadjacent crosstalk. o irr off isolation is the resistance (measured in ?db) between the input and output with the switch off. d g magnitude variation between analog input and output pins when the switch is on and the dc offset of composite video signal varies at the analog input pin. in ntsc standard, the frequency of the video signal is 3.58 mhz, and dc offset is from 0 to 0.714 v. d p phase variation between analog input and output pins when the switch is on and the dc offset of composite video signal varies at the analog input pin. in ntsc standard, the frequency of the video signal is 3.58 mhz, and dc offset is from 0 to 0.714 v. i cc static power-supply current i ccd variation of i cc for a change in frequency in the control (en , in) inputs ? i cc increase in supply current for each control input that is at the specified voltage level, rather than v cc or gnd
scds172a - july 2004 ? revised december 2004 4 post office box 655303 ? dallas, texas 75265 functional diagram (positive logic) d a s1 a s2 a s1 b s2 b s1 c s2 c s1 d s2 d en in d c d b d d 4 7 9 12 2 3 5 6 11 10 14 13 15 1 control logic
scds172a - july 2004 ? revised december 2004 5 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ?0.5 v to 4.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . control input voltage range, v in (see notes 1 and 2) ?0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . switch i/o voltage range, v i/o (see notes 1, 2, and 3) ?0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . control input clamp current, i ik (v in < 0) ?50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i/o port clamp current, i i/ok (v i/o < 0) ?50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . on-state switch current, i i/o (see note 4) 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd terminals 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 5): d package 73 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 5): dbq package 90 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 5): dgv package 120 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 5): pw package 108 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (see note 6): rgy package 39 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ?65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, a nd functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditi ons? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. all voltages are with respect to ground, unless otherwise specified. 2. the input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. v i and v o are used to denote specific conditions for v i/o . 4. i i and i o are used to denote specific conditions for i i/o . 5. the package thermal impedance is calculated in accordance with jesd 51-7. 6. the package thermal impedance is calculated in accordance with jesd 51-5. recommended operating conditions (see note 7) min max unit v cc supply voltage 3 3.6 v v ih high-level control input voltage (en , in) 2 5.5 v v il low-level control input voltage (en , in) 0 0.8 v v o analog i/o voltage 0 5.5 v t a operating free-air temperature ?40 85 c note 7: all unused control inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004.
scds172a - july 2004 ? revised december 2004 6 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) ? parameter test conditions min typ ? max unit v ik en , in v cc = 3 v, i in = ?18 ma ?1.8 v i ih en , in v cc = 3.6 v, v in and v en = 5.5 v 1 a i il en , in v cc = 3.6 v, v in and v en = gnd 1 a i oz v cc = 3.6 v, v o = 0 to 5.5 v, v i = 0, switch off 1 a i os ? v cc = 3.6 v, v o = 0.5 v cc , v i = 0, switch on 50 ma i off v cc = 0, v o = 0 to 5.5 v, v i = 0 1 a i cc v cc = 3.6 v, i i/o = 0, switch on or off 0.7 1.5 ma ? i cc en , in v cc = 3.6 v, one input at 3 v, other inputs at v cc or gnd 30 a i ccd v cc = 3.6 v, d and s ports open, v en = gnd, v in input switching 50% duty cycle 0.35 ma/ mhz c in en , in v in or v en = 5.5 v, 3.3 v or 0, f = 1 mhz 2.5 3.5 pf c off d port v i = 5.5 v, 3.3 v, or 0, f = 1 mhz, outputs open, switch off 5.5 7 pf c off s port v i = 5.5 v, 3.3 v, or 0, f = 1 mhz, outputs open, switch off 3.5 5 pf c on v i = 5.5 v, 3.3 v, or 0, f = 1 mhz, outputs open, switch on 10.5 14 pf r on # v cc = 3 v v i = 1 v, i o = 13 ma 3 6 ? ? r on(flat) || v cc = 3.3 v, v i = 0 to v cc , i o = 26 ma 1 ? ? v i , v o , i i , and i o refer to i/o pins. ? all typical values are at v cc = 3.3 v (unless otherwise noted), t a = 25 c. for i/o ports, the parameter i oz includes the input leakage current. ? the i os test is applicable to only one on channel at a time. the duration of this test is less than 1 s. # measured by the voltage drop between the d and s terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (d or s) terminals. || r on(flat) is the difference of r on in a given channel at specified voltages. switching characteristics over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v, r l = 75 ? , c l = 20 pf (unless otherwise noted) (see figures 6 and 7) parameter from (input) to (output) min typ max unit t pd(s) in d 2 5 ns t on in or en s 4 7 ns t off in or en s 2 7 ns dynamic characteristics over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) parameter test conditions typ ? unit d g r l = 150 ? , f = 3.58 mhz, see figure 7 0.2 % d p r l = 150 ? , f = 3.58 mhz, see figure 7 0.1 b w r l = 150 ? , see figure 8 500 mhz x talk r l = 150 ? , f = 10 mhz, r in = 10 ? , see figure 9 ?80 db o irr r l = 150 ? , f = 10 mhz, see figure 10 ?60 db ? all typical values are at v cc = 3.3 v (unless otherwise noted), t a = 25 c. d g and d p are expressed in absolute magnitude.
scds172a - july 2004 ? revised december 2004 7 post office box 655303 ? dallas, texas 75265 ?6 ?5 ?4 ?3 ?2 ?1 0 1 10 100 700 ?60 ?50 ?40 ?30 ?20 ?10 0 gain (db) figure 1. gain/phase vs frequency gain ?3 db at 627 mhz phase at ?3-db frequency, ?47 deg phase (deg) frequency (mhz) phase gain ?0.2 ?0.18 ?0.16 ?0.14 ?0.12 ?0.1 ?0.08 ?0.06 ?0.04 ?0.02 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 ?0.01 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 figure 2. differential gain/phase vs v bias differential phase (deg) differential gain (%) v bias (v) differential gain at 0.714 v, ?0.11% differential phase at 0.714 v, 0.0466 deg differental phase differental gain
scds172a - july 2004 ? revised december 2004 8 post office box 655303 ? dallas, texas 75265 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 1 10 100 700 0 20 40 60 80 100 120 140 160 figure 3. off isolation vs frequency frequency (mhz) off isolation (db) off isolation at 10 mhz, ?56 db phase at 10 mhz, 90 deg off isolation phase phase (deg) ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 1 10 100 700 frequency (mhz) 0 20 40 60 80 100 120 140 160 180 phase (deg) figure 4. crosstalk vs frequency crosstalk at 10 mhz, ?63 db phase at 10 mhz, 90 deg crosstalk (db) phase crosstalk
scds172a - july 2004 ? revised december 2004 9 post office box 655303 ? dallas, texas 75265 output voltage (v) input voltage (v) on-state resistance ( ? ) v o r on 0 4 8 12 16 20 0 1 2 3 4 5 012345 figure 5. output voltage/on-state resistance vs input voltage
scds172a - july 2004 ? revised december 2004 10 post office box 655303 ? dallas, texas 75265 parameter measurement information c l (see note a) test circuit r l analog output waveform (v o ) 0 v v cc voltage waveforms t pd(s) times notes: a. c l includes probe and jig capacitance. b. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. c. the outputs are measured one at a time, with one transition per measurement. 50% 50% 50 ? v g1 v cc dut 50 ? v in v s2 test c l r l v s2 3.3 v 0.3 v 3.3 v 0.3 v v cc v s1 t pds 75 75 20 pf 20 pf gnd v cc v cc gnd output control (v in ) input generator v o v s1 in s1 x s2 x en d x 0 v v oh 90% 90% figure 6. test circuit and voltage waveforms
scds172a - july 2004 ? revised december 2004 11 post office box 655303 ? dallas, texas 75265 parameter measurement information c l (see note a) test circuit r l analog output waveform (v o ) 0 v v cc voltage waveforms t on and t off times notes: a. c l includes probe and jig capacitance. b. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. c. the outputs are measured one at a time, with one transition per measurement. 50% 50% 50 ? v g1 v cc dut 50 ? v in v i test c l r l 3.3 v 0.3 v v cc v i t on /t off 75 20 pf v cc output control (v in ) input generator v o in or en d x s2 x 0 v v oh 90% 90% t off t on c l (see note a) r l s1 x figure 7. test circuit and voltage waveforms
scds172a - july 2004 ? revised december 2004 12 post office box 655303 ? dallas, texas 75265 parameter measurement information network analyzer (hp8753es) ext trigger bias p1 p2 v bias sawtooth waveform generator dut in en s1 a v en v in v cc note: for additional information on measurement method, refer to the ti application report, measuring differential gain and phase , literature number sloa040. r l = 150 ? d a figure 8. test circuit for differential gain/phase measurement differential gain and phase is measured at the output of the on channel. for example, when v in = 0, v en = 0, and d a is the input, the output is measured at s1 a . hp8753es setup average = 20 rbw = 300 hz st = 1.381 s p1 = ?7 dbm cw frequency = 3.58 mhz sawtooth waveform generator setup v bias = 0 to 1 v frequency = 0.905 hz
scds172a - july 2004 ? revised december 2004 13 post office box 655303 ? dallas, texas 75265 parameter measurement information network analyzer (hp8753es) r l = 150 ? ext trigger bias p1 p2 dut d a in en s1 a v en v in v cc v bias figure 9. test circuit for frequency response (b w ) the frequency response is measured at the output of the on channel. for example, when v in = 0, v en = 0, and d a is the input, the output is measured at s1 a . all unused analog i/o ports are left open. hp8753es setup average = 4 rbw = 3 khz v bias = 0.35 v st = 2 s p1 = 0 dbm
scds172a - july 2004 ? revised december 2004 14 post office box 655303 ? dallas, texas 75265 parameter measurement information network analyzer (hp8753es) r l = 150 ? ext trigger bias p1 p2 dut d a in en s1 a v en v in v cc v bias d b r in = 10 ? r l = 150 ? s1 b 50 ? ? ? a 50- ? termination resistor is needed for the network analyzer. figure 10. test circuit for crosstalk (x talk ) the crosstalk is measured at the output of the nonadjacent on channel. for example, when v in = 0, v en = 0, and d a is the input, the output is measured at s1 b . all unused analog input (d) ports and output (s) ports are connected to gnd through 10- ? and 50- ? pulldown resistors, respectively. hp8753es setup average = 4 rbw = 3 khz v bias = 0.35 v st = 2 s p1 = 0 dbm
scds172a - july 2004 ? revised december 2004 15 post office box 655303 ? dallas, texas 75265 parameter measurement information network analyzer (hp8753es) r l = 150 ? ext trigger bias p1 p2 dut d a in en s1 a v en v in v cc v bias r l = 150 ? s2 a 50 ? ? ? a 50- ? termination resistor is needed for the network analyzer. figure 11. test circuit for off isolation (o irr ) the off isolation is measured at the output of the off channel. for example, when v in = v cc , v en = 0, and d a is the input, the output is measured at s1 a . all unused analog input (d) ports are left open, and output (s) ports are connected to gnd through 50- ? pulldown resistors. hp8753es setup average = 4 rbw = 3 khz v bias = 0.35 v st = 2 s p1 = 0 dbm
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) ts3v340d active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dbqr active ssop/ qsop dbq 16 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year ts3v340dbqre4 active ssop/ qsop dbq 16 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year ts3v340dbqrg4 active ssop/ qsop dbq 16 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year ts3v340de4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dgvr active tvsop dgv 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dgvre4 active tvsop dgv 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dgvrg4 active tvsop dgv 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340dre4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340drg4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340pw active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim TS3V340PWE4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340pwg4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340pwr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340pwre4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340pwrg4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim ts3v340rgyr active vqfn rgy 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year ts3v340rgyrg4 active vqfn rgy 16 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. package option addendum www.ti.com 21-dec-2009 addendum-page 1
tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 21-dec-2009 addendum-page 2
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant ts3v340dgvr tvsop dgv 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 q1 ts3v340dr soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 ts3v340pwr tssop pw 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 ts3v340rgyr vqfn rgy 16 3000 330.0 12.4 3.8 4.3 1.5 8.0 12.0 q1 package materials information www.ti.com 30-jul-2010 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) ts3v340dgvr tvsop dgv 16 2000 346.0 346.0 29.0 ts3v340dr soic d 16 2500 333.2 345.9 28.6 ts3v340pwr tssop pw 16 2000 346.0 346.0 29.0 ts3v340rgyr vqfn rgy 16 3000 346.0 346.0 29.0 package materials information www.ti.com 30-jul-2010 pack materials-page 2
mechanical data mpds006c february 1996 revised august 2000 post office box 655303 ? dallas, texas 75265 dgv (r-pdso-g**) plastic small-outline 24 pins shown 14 3,70 3,50 4,90 5,10 20 dim pins ** 4073251/e 08/00 1,20 max seating plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 112 24 13 4,30 4,50 0,16 nom gage plane a 7,90 7,70 38 24 16 4,90 5,10 3,70 3,50 a max a min 6,60 6,20 11,20 11,40 56 9,60 9,80 48 0,08 m 0,07 0,40 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. d. falls within jedec: 24/48 pins mo-153 14/16/20/56 pins mo-194

mechanical data mtss001c january 1995 revised february 1999 post office box 655303 ? dallas, texas 75265 pw (r-pdso-g**) plastic small-outline package 14 pins shown 0,65 m 0,10 0,10 0,25 0,50 0,75 0,15 nom gage plane 28 9,80 9,60 24 7,90 7,70 20 16 6,60 6,40 4040064/f 01/97 0,30 6,60 6,20 8 0,19 4,30 4,50 7 0,15 14 a 1 1,20 max 14 5,10 4,90 8 3,10 2,90 a max a min dim pins ** 0,05 4,90 5,10 seating plane 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-153
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